Quantum computers promise to solve problems beyond the reach of classical machines, but their qubits are exquisitely fragile. A new study posted on the arXiv preprint server asks a deceptively simple question: How far can you do nothing on a quantum computer? The answer exposes a hidden landscape of spatial reliability that could reshape how we build and benchmark the error-corrected machines of the future. [arXiv:2608.21904]
Preserving a quantum state while moving it across a physical chip is not a passive act. Every swap gate, every idle moment, invites decoherence, crosstalk, and relaxation. The researchers turned this vulnerability into a high-resolution probe, using a deterministic “do-nothing” protocol that simply transfers a prepared state along predefined routes and measures how much of it survives. The result is the first route-resolved comparative assessment of two leading superconducting processors: Rigetti’s Cepheus-1-108Q and IBM’s Heron-r2.
The Core Finding
The team did not invent a new protocol. Instead, they repurposed an established state-transfer task as a spatial stethoscope. For each initial qubit, they computed two numbers: the largest radius within which every shortest route succeeded, and the longest single successful path they could find. Think of it like testing a city’s road network by sending a car with a fragile package and seeing how far it can travel before the package degrades. On the IBM Heron-r2 processor, the isotropic radius—the distance in swap gates within which all tested routes preserved the state above the classical fidelity limit—reached 10. The longest successful path stretched to a swap distance of 27. On Rigetti’s Cepheus, the isotropic radius was just 1, yet selected routes still pushed the state to a swap distance of 8.
“this trivial state-transfer protocol... proves to be a non-trivial task that exposes the information to cumulative relaxation, dephasing, and environmental cross-talk.”
These numbers reveal a sharp distinction between uniform spatial reliability and best-route performance. A chip can have a tiny isotropic radius—meaning most directions quickly kill the quantum state—while still possessing a few narrow corridors where the state survives much longer. That insight matters enormously for quantum error correction, where logical qubits must be shuttled across the lattice with near-perfect fidelity.
The State of the Field
For years, quantum benchmarking has relied on randomized circuits, gate set tomography, or cycle benchmarking to extract average error rates. Those methods are powerful but often mask spatial inhomogeneities. The do-nothing protocol, by contrast, is deterministic and low-complexity, making it an ideal spatial probe. Prior work by the same community established the protocol as a baseline, but nobody had used it to compare entire processor topologies route-by-route. The current study arrives at a moment when superconducting qubit processors are crossing the 100-qubit threshold, and the industry is racing to demonstrate the first useful logical qubits. IBM’s Heron architecture, introduced in late 2023, emphasizes tunable couplers and dense connectivity, while Rigetti’s Cepheus represents a more modular, chiplet-oriented design. The stark difference in isotropic radius—10 versus 1—suggests that architectural choices around qubit connectivity, crosstalk suppression, and calibration uniformity directly shape the spatial reliability landscape.
From Lab to Reality
For scientists, this work unlocks a practical diagnostic tool. By mapping isotropic radii across a chip, researchers can identify weak spots that would sabotage a surface code or other error-correcting scheme. For engineers, the route-resolved data can inform qubit placement, swap-network compilation, and dynamic recalibration strategies. A chip with a large isotropic radius can support more flexible logical qubit movement, reducing the overhead of fault-tolerant operations. For investors, the findings touch the quantum error correction market, projected to reach $1.2 billion by 2030 according to industry analysts. Companies that can demonstrate uniform, high-fidelity state transfer across large fractions of their processors will be best positioned to deliver the first commercially relevant logical qubits. IBM’s 10-qubit isotropic radius on Heron-r2 hints that such uniformity is achievable, while Rigetti’s result underscores that even a smaller radius can still support useful long-range routes if routing algorithms are smart enough.
What Still Needs to Happen
The reported quantities are empirical snapshots, conditional on the evaluated route families, finite-shot decision rules, calibration state, and execution time. They are not architecture-wide constants. A chip’s isotropic radius can drift with temperature, aging, or recalibration. The first challenge is to turn this static probe into a dynamic, real-time diagnostic that can guide adaptive error mitigation. Researchers at IBM and Rigetti are already exploring machine-learning-driven calibration cycles that could continuously update spatial reliability maps. The second challenge is scaling. The current study evaluated shortest-path routes and a limited family of longer paths. Extending the method to all-to-all connectivity on 1,000-qubit processors will require efficient route sampling and statistical confidence bounds. Groups at Google Quantum AI and the MIT Center for Quantum Engineering are developing scalable benchmarking frameworks that could incorporate this spatial probe. Until these challenges are met, the do-nothing protocol remains a research tool rather than a production-grade qualification test.
In short: quantum error correction demands uniform spatial reliability, and this do-nothing benchmark reveals that today’s best processors still exhibit stark trade-offs between isotropic coverage and peak route performance.